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A New TWA based Efficient Signal Integrity Verification Technique for Non-Uniform RLC Interconnect Lines

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dc.contributor.authorJo, Chanmin-
dc.contributor.authorKim, Hyunsik-
dc.contributor.authorShin, Seongkyun-
dc.contributor.authorEo, Yungseon-
dc.contributor.authorShim, Jongin-
dc.date.accessioned2021-06-23T23:38:10Z-
dc.date.available2021-06-23T23:38:10Z-
dc.date.issued2005-05-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/45962-
dc.description.abstractA new TWA-based signal integrity verification technique for practical layout structures which are composed of non-uniform RLC lines with various discontinuities is presented. Transforming the non-uniform lines into virtual uniform lines, signal integrity of the practical layout structures can be very efficiently estimated by using the TWA-technique. It is shown that the proposed technique can estimate the signal integrity much more efficiently than generic SPICE model within 5% error.-
dc.format.extent5-
dc.language한국어-
dc.language.isoKOR-
dc.publisher대한전자공학회-
dc.titleA New TWA based Efficient Signal Integrity Verification Technique for Non-Uniform RLC Interconnect Lines-
dc.typeArticle-
dc.publisher.location대한민국-
dc.identifier.bibliographicCitation대한전자공학회 학술대회, pp 195 - 199-
dc.citation.title대한전자공학회 학술대회-
dc.citation.startPage195-
dc.citation.endPage199-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassother-
dc.subject.keywordAuthorinterconnect-
dc.subject.keywordAuthornon-uniform-
dc.subject.keywordAuthorinductance-
dc.subject.keywordAuthorsignal integrity-
dc.subject.keywordAuthorTWA-
dc.identifier.urlhttps://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01731668-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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