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Simulation benchmarking for the whole resist process
- Issue Date
- Apr-2004
- Publisher
- SPIE
- Keywords
- Benchmark; Lithography; Photolithography; Process latitude; Simulation; Solid-C
- Citation
- Proceedings of SPIE - The International Society for Optical Engineering, v.5378, pp 58 - 64
- Pages
- 7
- Indexed
- SCIE
SCOPUS
- Journal Title
- Proceedings of SPIE - The International Society for Optical Engineering
- Volume
- 5378
- Start Page
- 58
- End Page
- 64
- ISSN
- 0277-786X
- Abstract
- A full lithography simulation has become an essential factor for semiconductor manufacturing. We have been researching all kinds of problems for lithography process by creating and using our own simulation tool, which has contributed to extracting parameters related to exposure, post exposure bake, and development. Also, its performance has been proved in comparison with other simulation tools. In this paper, our lithography simulator and some of its features are introduced. For its benchmark, we describe our own simulator's performance and accuracy for whole resist process by the comparison of a commercial tool. The sensitivity of process parameters and process latitude due to its parameters are discussed.
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