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Evaluation of Radio-Frequency Performance of Gate-All-Around Ge/GaAs Heterojunction Tunneling Field-Effect Transistor with Hetero-Gate-Dielectric by Mixed-Mode Simulation

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dc.contributor.authorRoh, Flee Bum-
dc.contributor.authorSeo, Jae Hwa-
dc.contributor.authorYoon, Young Jun-
dc.contributor.authorBae, Jin-Hyuk-
dc.contributor.authorCho, Eou-Sik-
dc.contributor.authorLee, Jung-Hee-
dc.contributor.authorCho, Seongjae-
dc.contributor.authorKang, In Man-
dc.date.available2020-02-28T15:45:15Z-
dc.date.created2020-02-06-
dc.date.issued2014-11-
dc.identifier.issn1975-0102-
dc.identifier.urihttps://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/12148-
dc.description.abstractIn this work, the frequency response of gate-all-around (GAA) Ge/GaAs heterojunction tunneling field-effect transistor (TFET) with hetero-gate-dielectric (HGD) and pnpn channel doping profile has been analysed by technology computer-aided design (TCAD) device-circuit mixed-mode simulations, with comparison studies among ppn, pnpn, and HGD pnpn TFET devices. By recursive tracing of voltage transfer curves (VTCs) of a common-source (CS) amplifier based on the HGD pnpn TFET, the operation point (Q-point) was obtained at V-DS = 1 V, where the maximum available output swing was acquired without waveform distortion. The slope of VTC of the amplifier was 9.21 V/V (19.4 dB), which mainly resulted from the ponderable direct-current (DC) characteristics of HGD pnpn TFET. Along with the DC performances, frequency response with a small-signal voltage of 10 mV has been closely investigated in terms of voltage gain (A(v)), unit-gain frequency (f(unity)), and cut-off frequency (f(T)). The Ge/GaAs HGD pnpn TFET demonstrated A(v) = 19.4 dB, f(unity) = 10 THz, f(T) = 0.487 THz and f(max) = 18THz.-
dc.language영어-
dc.language.isoen-
dc.publisherSPRINGER SINGAPORE PTE LTD-
dc.relation.isPartOfJOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY-
dc.subjectFET-
dc.titleEvaluation of Radio-Frequency Performance of Gate-All-Around Ge/GaAs Heterojunction Tunneling Field-Effect Transistor with Hetero-Gate-Dielectric by Mixed-Mode Simulation-
dc.typeArticle-
dc.type.rimsART-
dc.description.journalClass1-
dc.identifier.wosid000344040500035-
dc.identifier.doi10.5370/JEET.2014.9.6.2070-
dc.identifier.bibliographicCitationJOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY, v.9, no.6, pp.2070 - 2078-
dc.identifier.kciidART001925153-
dc.identifier.scopusid2-s2.0-84908529598-
dc.citation.endPage2078-
dc.citation.startPage2070-
dc.citation.titleJOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY-
dc.citation.volume9-
dc.citation.number6-
dc.contributor.affiliatedAuthorCho, Eou-Sik-
dc.contributor.affiliatedAuthorCho, Seongjae-
dc.type.docTypeArticle-
dc.subject.keywordAuthorFrequency response-
dc.subject.keywordAuthorGate-all-around-
dc.subject.keywordAuthorHeterojunction-
dc.subject.keywordAuthorTunneling field-effect transistor-
dc.subject.keywordAuthorHetero-gate-dielectric-
dc.subject.keywordAuthorTCAD-
dc.subject.keywordAuthorMixed-mode simulation-
dc.subject.keywordPlusFET-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.description.journalRegisteredClasskci-
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