Vertical stack array of one-time programmable nonvolatile memory based on pn-junction diode and its operation scheme for faster access

Abstract

In this work, a three-dimensional (3-D) architecture of one-time programmable (OTP) nonvolatile memory (NVM) arrays is introduced and its viable process integration and operation method are schemed. Vertical stack architecture is highly persued for higher-level integration and NVMs based on devices free from transistors and charge trapping layers would be one of the candidates. In this work, in an effort for the NVM technology trend, architecture, fabrication process, and operation scheme for faster data access are studied in depth. Silicon (Si) pn-junction diode is focused by its virtues of cost-effectiveness, process maturity, and compatibility to peripheral Si CMOS circuits.