Investigation and Optimization of Double-gate MPI 1T DRAM with Gate-induced Drain Leakage Operation
- Authors
- Ha, Jongmin; Lee, Jae Yoon; Kim, Myeongseon; Cho, Seongjae; Cho, Il Hwan
- Issue Date
- Apr-2019
- Publisher
- IEEK PUBLICATION CENTER
- Keywords
- 1T DRAM; middle partial insulation; gate-induced drain leakage (GIDL); TCAD
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.19, no.2, pp.165 - 171
- Journal Title
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
- Volume
- 19
- Number
- 2
- Start Page
- 165
- End Page
- 171
- URI
- https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/1668
- DOI
- 10.5573/JSTS.2019.19.2.165
- ISSN
- 1598-1657
- Abstract
- In this paper, we propose a double-gate one-transistor dynamic random-access memory (1T DRAM) with middle partial insulation (MPI) structure for low power application. Low power operation with the gate-induced drain leakage (GIDL) programming method can be obtained while maintaining the original advantages of MPI 1T-DRAM. The optimization of the MPI 1T-DRAM device for the GIDL method is investigated with technology computer-aided design (TCAD). High current ratio and low power consumption are obtained from the proposed 1T-DRAM device. Optimal device design in terms of barrier insulator length and fin width have been carried out for improvements of device performances and reliability.
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Collections - IT융합대학 > 전자공학과 > 1. Journal Articles
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