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Cited 12 time in webofscience Cited 13 time in scopus
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Design and Characterization of Semi-Floating-Gate Synaptic Transistor

Authors
Cho, YongbeomLee, Jae YoonYu, EunseonHan, Jae-HeeBaek, Myung-HyunCho, SeongjaePark, Byung-Gook
Issue Date
Jan-2019
Publisher
MDPI
Keywords
semi-floating gate; synaptic transistor; neuromorphic system; spike-timing-dependent plasticity (STDP); highly miniaturized transistor structure; low power consumption
Citation
MICROMACHINES, v.10, no.1
Journal Title
MICROMACHINES
Volume
10
Number
1
URI
https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/2049
DOI
10.3390/mi10010032
ISSN
2072-666X
Abstract
In this work, a study on a semi-floating-gate synaptic transistor (SFGST) is performed to verify its feasibility in the more energy-efficient hardware-driven neuromorphic system. To realize short- and long-term potentiation (STP/LTP) in the SFGST, a poly-Si semi-floating gate (SFG) and a SiN charge-trap layer are utilized, respectively. When an adequate number of holes are accumulated in the SFG, they are injected into the nitride charge-trap layer by the Fowler-Nordheim tunneling mechanism. Moreover, since the SFG is charged by an embedded tunneling field-effect transistor existing between the channel and the drain junction when the post-synaptic spike occurs after the pre-synaptic spike, and vice versa, the SFG is discharged by the diode when the post-synaptic spike takes place before the pre-synaptic spike. This indicates that the SFGST can attain STP/LTP and spike-timing-dependent plasticity behaviors. These characteristics of the SFGST in the highly miniaturized transistor structure can contribute to the neuromorphic chip such that the total system may operate as fast as the human brain with low power consumption and high integration density.
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Han, Jae Hee
Engineering (Department of Materials Science & Engineering)
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