Multi-Stage Organic Logic Circuits Using Via-Hole-Less Metal Interconnects

Abstract

Multi-metal interconnection is a crucial technology for the development of large-scale integrated circuits (ICs). However, organic semiconductors are not robust enough to be compatible with conventional lithography-and-etching-based via-forming methods. Thus, an alternative metal interconnect method is required for successful organic IC implementation. In-situ patterning of a dielectric polymer through a shadow mask while depositing in vapor phase possibly addresses the issues in both solvent susceptibility and process complexity. Here we report multi-stage organic logic circuits with a multi-level metal interconnection scheme based on patterned interlayer dielectrics via vapor phase deposition. We implement an exclusive OR circuit composed of four 2-input NAND gates and three-level metal interconnections to demonstrate the potential of the proposed solvent-free metal interconnection scheme. © 1980-2012 IEEE.