Multi-Stage Organic Logic Circuits Using Via-Hole-Less Metal Interconnects
- Authors
- Park, H.; Yoo, H.; Lee, C.; Kim, J.-J.; Im, S.G.
- Issue Date
- Nov-2020
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- interconnection; Organic semiconductors; thin-film circuits; thin-film transistors; vapor deposition
- Citation
- IEEE Electron Device Letters, v.41, no.11, pp.1685 - 1687
- Journal Title
- IEEE Electron Device Letters
- Volume
- 41
- Number
- 11
- Start Page
- 1685
- End Page
- 1687
- URI
- https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/79110
- DOI
- 10.1109/LED.2020.3027423
- ISSN
- 0741-3106
- Abstract
- Multi-metal interconnection is a crucial technology for the development of large-scale integrated circuits (ICs). However, organic semiconductors are not robust enough to be compatible with conventional lithography-and-etching-based via-forming methods. Thus, an alternative metal interconnect method is required for successful organic IC implementation. In-situ patterning of a dielectric polymer through a shadow mask while depositing in vapor phase possibly addresses the issues in both solvent susceptibility and process complexity. Here we report multi-stage organic logic circuits with a multi-level metal interconnection scheme based on patterned interlayer dielectrics via vapor phase deposition. We implement an exclusive OR circuit composed of four 2-input NAND gates and three-level metal interconnections to demonstrate the potential of the proposed solvent-free metal interconnection scheme. © 1980-2012 IEEE.
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - IT융합대학 > 전자공학과 > 1. Journal Articles
![qrcode](https://api.qrserver.com/v1/create-qr-code/?size=55x55&data=https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/79110)
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.