Detailed Information

Cited 9 time in webofscience Cited 11 time in scopus
Metadata Downloads

A More Hardware-Oriented Spiking Neural Network Based on Leading Memory Technology and Its Application With Reinforcement Learning

Authors
Kim, Min-HwiHwang, SungminBang, SuhyunKim, Tae-HyeonLee, Dong KeunAnsari, M.H.R.Cho, SeongjaePark, Byung-Gook
Issue Date
Sep-2021
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
Artificial neural network (ANN); Biological neural networks; cross-point array architecture; Games; Hardware; hardware-driven artificial intelligence; low energy consumption; Neurons; reinforcement learning (RL); resistive-switching random access memory (RRAM); Rush Hour game; sequential task; Silicon; Silicon compounds; spiking neural network (SNN); Switches; synaptic device.
Citation
IEEE Transactions on Electron Devices, v.68, no.9, pp.4411 - 4417
Journal Title
IEEE Transactions on Electron Devices
Volume
68
Number
9
Start Page
4411
End Page
4417
URI
https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/81969
DOI
10.1109/TED.2021.3099769
ISSN
0018-9383
Abstract
In recent days, more hardware-driven artificial intelligence system capable of brain-like low-energy consumption is gaining ever-increasing interest. The hardware-driven property lies in the low-power synaptic device and its array along with the area and energy-efficient neuron circuits. In this work, a spiking neural network (SNN) based on analog synaptic device of resistive-switching random access memory (RRAM) is constructed from the experimentally fabricated devices. Furthermore, the capability of the designed SNN hardware for sequential tasks through an optimal reinforcement learning (RL) algorithm is demonstrated. More specifically, the Rush Hour game is conducted as an example of applications for the sequential task for which an SNN architecture is plausibly suited. The rule of the game is simple but has not been demonstrated by a hardware-oriented artificial neural network (ANN) yet, and in this work, it is reported that the analog RRAM synaptic devices in the cross-point array architecture successfully solve the problem via the RL algorithm. IEEE
Files in This Item
There are no files associated with this item.
Appears in
Collections
IT융합대학 > 전자공학과 > 1. Journal Articles

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher Cho, Seong Jae photo

Cho, Seong Jae
IT (Major of Electronic Engineering)
Read more

Altmetrics

Total Views & Downloads

BROWSE