Predominance of Carrier Diffusion in Determination of Data Retention in One-transistor Dynamic Random-access Memory
- Authors
- Lee, Yi Ju; Cho, Seongjae
- Issue Date
- Dec-2021
- Publisher
- 대한전자공학회
- Keywords
- One-transistor dynamic random-access memory (1T DRAM); 3-D stack array; capacitor truncation; data retention; carrier diffusion; error function; continuity equation
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.21, no.6, pp.406 - 411
- Journal Title
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
- Volume
- 21
- Number
- 6
- Start Page
- 406
- End Page
- 411
- URI
- https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/83041
- DOI
- 10.5573/JSTS.2021.21.6.406
- ISSN
- 1598-1657
- Abstract
- One-transistor (1T) dynamic random-access memory (DRAM) has been widely studied for higher array density and obtaining three-dimensional (3-D) array stack viability by truncating the capacitor. However, its rather short retention time has been pointed out as a weak point compared with that of conventional one-transistor one-capacitor (1T1C) DRAM cell. The three dominating factors in determining the data retention in 1T DRAM can be sorted as diffusion, drift, and recombination, by which the programmed carriers are annihilated. In this study, out of those three major factors, the most predominant one is sought in the analytical and mathematical manners. It has been found that carrier diffusion has the key to modulation of the retention time of 1T DRAM and the other two factors are insignificantly small compared with diffusion. Error functions depending on both position and time were adopted to describe the distribution of programmed holes experiencing diffusion and drift in conjunction with solving the continuity equation. It has been concluded that carrier diffusion is the most dominant factor in determining the data retention in 1T DRAM, which suggests that proper ways of decelerating the carrier diffusion out of the channel be sought in optimally designing 1T DRAM cells.
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