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Mechanism of Non-Ideal Transfer Characteristic at Low Drain Voltage in Metal-Capped Amorphous Oxide Thin Film Transistor

Authors
Lee, Ji YeLee, Sang Yeol
Issue Date
Feb-2022
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
amorphous oxide semiconductor; Electric variables; Electrodes; Electron devices; hump phenomenon.; metal capping; Metals; Semiconductor device measurement; Stress; Thin film transistors; thin-film transistor
Citation
IEEE Journal of the Electron Devices Society, v.10, pp.40 - 44
Journal Title
IEEE Journal of the Electron Devices Society
Volume
10
Start Page
40
End Page
44
URI
https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/83828
DOI
10.1109/JEDS.2021.3130586
ISSN
2168-6734
Abstract
Issues of amorphous oxide semiconductors (AOSs) thin-film transistors (TFTs) mainly focus on improving electrical performance and stability. Currently, the hump, the abnormal transfer characteristic, is also an essential factor of AOSs TFT. The hump phenomenon was observed for AOS-TFTs with a metal capping (MC) layer under various measurement conditions. The mobility in the MC TFT was improved from 14.8 cm/Vs to 19.2 cm2/Vs compared to that of the conventional TFTs. The improved electrical characteristics in the MC structure are representative of the carrier injection effect and the change of the current path. This reason reveals that the MC structure has a hump phenomenon under the low drain to source voltage (VDS). The hump characteristic does not significantly affect the overall MC TFT characteristics (transfer characteristic, improved electrical characteristics through MC structure, etc.). In addition, it was confirmed that it exhibits very stable hump characteristics through repeated measurements and uniformity. It was found that two current paths are formed mainly due to carrier injection from the metal capping layer in the hump phenomenon observed at low VDS. These divided current paths can lead to two on-currents (Ion) in the transfer curve. Many studies have recently been conducted to fabricate semiconductor devices with multi-values such as 0, 1, and 2. This divided current path could propose a simple method to achieve multi-values with an easy process. Author
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Lee, Sang Yeol
반도체대학 (반도체·전자공학부)
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