A Complementary Logic-in-Memory Inverter From Organic-Inorganic Hybrid Transistors
DC Field | Value | Language |
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dc.contributor.author | Seo, Juhyung | - |
dc.contributor.author | Kim, Seongjae | - |
dc.contributor.author | Yoo, Hocheon | - |
dc.date.accessioned | 2022-12-05T00:40:04Z | - |
dc.date.available | 2022-12-05T00:40:04Z | - |
dc.date.created | 2022-12-05 | - |
dc.date.issued | 2022-11 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/gachon/handle/2020.sw.gachon/86204 | - |
dc.description.abstract | Logic-in-memory (LIM) technology is an important technology that overcomes the bottleneck, a limitation of the von Neumann architecture. As described in previous reports, the LIM technology was fabricated with a resistive load inverter structure. However, there are some limitations due to the high-power consumption issue and low noise margin. As a result, the need for a LIM device with a complementary structure has emerged. Here, we propose a LIM architecture-based organic-inorganic complementary inverter circuit with a stable noise margin using a p-type floating-gate transistor memory (FGTM) and an n-type zinc-tin oxide (ZTO) thin-film transistor (TFT). We demonstrate that the output of the proposed complementary inverter circuit is determined according to the state of the FGTM memory. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.relation.isPartOf | IEEE ELECTRON DEVICE LETTERS | - |
dc.title | A Complementary Logic-in-Memory Inverter From Organic-Inorganic Hybrid Transistors | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000876041700031 | - |
dc.identifier.doi | 10.1109/LED.2022.3208194 | - |
dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.43, no.11, pp.1902 - 1904 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.scopusid | 2-s2.0-85139423952 | - |
dc.citation.endPage | 1904 | - |
dc.citation.startPage | 1902 | - |
dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.volume | 43 | - |
dc.citation.number | 11 | - |
dc.contributor.affiliatedAuthor | Seo, Juhyung | - |
dc.contributor.affiliatedAuthor | Kim, Seongjae | - |
dc.contributor.affiliatedAuthor | Yoo, Hocheon | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Inverters | - |
dc.subject.keywordAuthor | Electron traps | - |
dc.subject.keywordAuthor | Nonvolatile memory | - |
dc.subject.keywordAuthor | Thin film transistors | - |
dc.subject.keywordAuthor | Transistors | - |
dc.subject.keywordAuthor | Logic gates | - |
dc.subject.keywordAuthor | Electrodes | - |
dc.subject.keywordAuthor | Organic semiconductors | - |
dc.subject.keywordAuthor | oxide semiconductors | - |
dc.subject.keywordAuthor | thin-film transistors | - |
dc.subject.keywordAuthor | complementary inverter circuit | - |
dc.subject.keywordAuthor | logic-in-memory circuit | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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