Step-like current-voltage thin-film transistors with amorphous SiZnSnO/ SiInZnO/SiZnSnO multilayered-channels

Abstract

Multi-valued logic (MVL) is a critical approach for high-density information and next-generation digital elec-tronics. Recently developed multilayered-channel structure electronic devices provide new transistor operation of multi-valued logic switching characteristics. This paper investigates the step-like transfer curves of the amorphous SiZnSnO/SiInZnO/SiZnSnO (a-SZTO/SIZO/SZTO or a-SSS) multilayered-channel thin-film transistors (TFTs). The step-like transfer curves of a-SSS TFTs can be tuned intentionally by varying the thickness of the top and bottom layers of a-SZTO mainly because a low conducting material is introduced as a barrier layer to separate the top and bottom layers to obtain the intermediate states. Additionally, the conducting nature of the middle/barrier layer of a-SIZO was varied and studied for different Si concentrations.