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A 32-Gb/s Single-Ended PAM-4 Transceiver With Asymmetric Termination and Equalization Techniques for Next-Generation Memory InterfacesGo to Link

Kim, Hyuntae; Jo, Yunseong; Lee, Sanghun; Lee, Eunsang; Choi, Young; Park, Jaewoo; Kwak, Myoungbo; Choi, Jung-Hwan; Choi, Youngdon; Han, Jaeduk

ArticleIssue Date2024CitationIEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.11, pp 4912 - 4923PublisherInstitute of Electrical and Electronics Engineers
SCOPUS
A 32-to-50Gb/s/pin Single-Ended PAM-4 Transmitter with a ZQ-Based FFE and PAM-4 LSB DBI-DC EncodingGo to Link

Jo, Yunseong; Kim, Hyuntae; Choi, Young; Park, Jaewoo; Kwak, Myoungbo; Han, Jaeduk

ArticleIssue Date2025CitationDigest of Technical Papers - IEEE International Solid-State Circuits Conference, pp 400 - 402PublisherIEEE
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