Investigating the interface characteristics of high-k ZrO₂/SiO₂ stacked gate insulator grown by plasma-enhanced atomic layer deposition for improving the performance of InSnZnO thin film transistors
- Authors
- Choi, Wan-Ho; Kim, MinJung; Jeon, Woojin; Park, Jin-Seong
- Issue Date
- Jan-2020
- Publisher
- AMER INST PHYSICS
- Citation
- AIP ADVANCES, v.10, no.1, pp.1 - 6
- Indexed
- SCIE
SCOPUS
- Journal Title
- AIP ADVANCES
- Volume
- 10
- Number
- 1
- Start Page
- 1
- End Page
- 6
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/11471
- DOI
- 10.1063/1.5126151
- ISSN
- 2158-3226
- Abstract
- High-dielectric constant (k) materials have attracted a lot of attention for use as gate insulators (GIs) that enable low-voltage operation of thin film transistors (TFTs). However, high-k GIs also induce severe degradation in TFT characteristics, such as effective mobility (mu(eff)). Therefore, in this study, a stacked GI structure of ZrO₂ and SiO₂ was investigated. The mechanism by which the properties of the high-k GI influence TFT operating characteristics was revealed. Based on this mechanism, an optimized stacked GI structure that exhibited a low subthreshold swing and high mu eff was found and used to achieve low-voltage operation in a TFT device.
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