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Investigation of Positive Bias Temperature Instability Characteristics of Fully Depleted Silicon on Insulator Tunneling Field Effect Transistor with High-k Dielectric Gate Stacks

Authors
Song, Hyeong-SubKim, So-YeongLim, Dong-HwanKwon, Sung-KyuChoi, Chang-HwanLee, Ga-WonLee, Hi-Deok
Issue Date
Oct-2019
Publisher
AMER SCIENTIFIC PUBLISHERS
Keywords
TFET; PBTI; FD-SOI; Local Trap; Reliability
Citation
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.19, no.10, pp.6131 - 6134
Indexed
SCIE
Journal Title
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY
Volume
19
Number
10
Start Page
6131
End Page
6134
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/12438
DOI
10.1166/jnn.2019.16992
ISSN
1533-4880
Abstract
The positive bias temperature instability (PBTI) characteristics of fully depleted silicon on insulator (FD-SOI) tunneling field effect transistor (TFET) are investigated in comparison with those of metal oxide semiconductor field effect transistor (MOSFET) fabricated with the same technology process. Unlike some of the previously reported studies, in which the PBTI lifetime of TFET is much longer than that of MOSFET, in this study, the PBTI lifetime of TFET is found to be shorter than that of MOSFET. This result is very interesting, because degradation of electrical parameters of TFET is mainly affected by local traps near the source junction rather than global traps in the channel region. Large degradation of the electrical parameters of TFET due to PBTI stress would result from large fluctuation of the vertical electric field caused by traps near the source junction. This electric field fluctuation near the local region in TFET has more impact on electrical parameter degradation than channel conductivity fluctuation in MOSFET. Therefore, to improve the reliability characteristics of TFET, evaluation of PBTI characteristics and improvement of the quality of gate oxide near the source junction are essential.
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COLLEGE OF ENGINEERING (SCHOOL OF MATERIALS SCIENCE AND ENGINEERING)
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