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A Novel Program Operation Scheme With Negative Bias in 3-D nand Flash Memory

Authors
Sim, Jae-MinKang, MyounggonSong, Yun-Heub
Issue Date
Dec-2021
Publisher
Institute of Electrical and Electronics Engineers
Keywords
3-D nand flash memory; Ash; Dry etching; Electric potential; Electron traps; natural Vth shift (NVS); negative bias; program operation; Reliability; scaling down; self-boosting operation.; Timing; Voltage
Citation
IEEE Transactions on Electron Devices, v.68, no.12, pp 6112 - 6117
Pages
6
Indexed
SCIE
SCOPUS
Journal Title
IEEE Transactions on Electron Devices
Volume
68
Number
12
Start Page
6112
End Page
6117
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/140177
DOI
10.1109/TED.2021.3121648
ISSN
0018-9383
1557-9646
Abstract
In this article, we proposed a new program operation scheme to overcome the degradation of program window in scaling down of 3-D NAND( )flash memory. First, we investigated natural V-th shift (NVS) effect in scaled-down structure and confirmed that this effect occurs due to an increase in fringe field by adjacent read voltage. Second, we investigated programmed and erased V-th window with scaling down and confirmed that programmed and erased V-th is decreased significantly due to the NVS effect. To overcome this scaling effect, we proposed a new program operation scheme using negative bias. The proposed scheme not only improves the program window margin but also achieves voltage scaling. In addition, the proposed scheme enables multistring operation through improved self-boosting, which is a compatible scheme in full array level.
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COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)
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