A SCAN Chain Generator for Verification of Full-Custom Integrated Circuits
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shin, Taeho | - |
dc.contributor.author | Han, Jae duk | - |
dc.date.accessioned | 2022-07-06T11:33:27Z | - |
dc.date.available | 2022-07-06T11:33:27Z | - |
dc.date.created | 2022-03-07 | - |
dc.date.issued | 2021-11 | - |
dc.identifier.issn | 2163-9612 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/140377 | - |
dc.description.abstract | This paper demonstrates a circuit generator that produces schematic and layout of custom-digital SCAN chains for design-for-Test (DFT) of analog and mixed-signal integrated circuits. The schematic/layout generator scrips are parameterized to cover various test cases; the number of bits and their pin names, aspect ratio, and buffer sizes can be configured by users. Various instances are generated in a 40-nm CMOS technology to verify the generator's capability to produce parameterized and DRC-clean layouts. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.title | A SCAN Chain Generator for Verification of Full-Custom Integrated Circuits | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Han, Jae duk | - |
dc.identifier.doi | 10.1109/ISOCC53507.2021.9613981 | - |
dc.identifier.scopusid | 2-s2.0-85123382018 | - |
dc.identifier.wosid | 000861550500142 | - |
dc.identifier.bibliographicCitation | Proceedings - International SoC Design Conference 2021, ISOCC 2021, pp.335 - 336 | - |
dc.relation.isPartOf | Proceedings - International SoC Design Conference 2021, ISOCC 2021 | - |
dc.citation.title | Proceedings - International SoC Design Conference 2021, ISOCC 2021 | - |
dc.citation.startPage | 335 | - |
dc.citation.endPage | 336 | - |
dc.type.rims | ART | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordAuthor | design automation | - |
dc.subject.keywordAuthor | design for test | - |
dc.subject.keywordAuthor | full-custom digital circuit | - |
dc.subject.keywordAuthor | scan-based testing | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/9613981 | - |
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