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Lumped Parameter Modeling based Power Loop Analysis Technique of Power Circuit Bo aid with Wide Conduction Aiea for WBG SemiconductorsWBG 전력 반도체를 위한 넓은 전류 도통 영역을 갖는 전력 회로 보드의 집중정수 모델링 기반 파워 루프 해석 기법

Other Titles
WBG 전력 반도체를 위한 넓은 전류 도통 영역을 갖는 전력 회로 보드의 집중정수 모델링 기반 파워 루프 해석 기법
Authors
Cho, Min-ShinKim, Rae Young
Issue Date
Jan-2021
Publisher
Korean Institute of Electrical Engineers
Keywords
Analysis; Lumped parameter modeling; Power loop; Wbg semiconductors; Wide conduction area
Citation
Transactions of the Korean Institute of Electrical Engineers, v.70, no.1, pp.79 - 88
Indexed
SCOPUS
KCI
Journal Title
Transactions of the Korean Institute of Electrical Engineers
Volume
70
Number
1
Start Page
79
End Page
88
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/142440
DOI
10.5370/KIEE.2021.70.1.079
ISSN
1975-8359
Abstract
In this paper, we propose a power loop analysis method based on limped parameter modeling of power circuit board with wide current conduction area for WBG power semiconductors. The proposed analysis method is modeled with lumped parameter so that power loops having various current paths can be analyzed, so the analysis is simple, easy to apply, and has the advantage of enabling dynamic power loop analysis. The validity of the lumped parameter model was verified through LTSPICE and Q3D simulation results.
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