Automated Neural Network Accelerator Generation Framework for Multiple Neural Network Applications

Abstract

Neural networks are widely used in various applications, but general neural network accelerators support only one application at a time. Therefore, information for each application, such as synaptic weights and bias data, must be loaded quickly to use multiple neural network applications. Field-programmable gate array (FPGA)-based implementation has huge performance overhead owing to low data transmission bandwidth. In order to solve this problem, this paper presents an automated FPGA-based multi-neural network accelerator generation framework that can quickly support several applications by storing neural network application data in an on-chip memory inside the FPGA. To do this, we first design a shared custom hardware accelerator that can support rapid changes in multiple target neural network applications. Then, we introduce an automated multi-neural network accelerator generation framework that performs training, weight quantization, and neural accelerator synthesis.