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모듈형 멀티레벨 전압형 HVDC 시스템을 위한 시간 지연을 고려한 디지털 제어기의 설계A Design Methodology of Digital Controller Considering Time Delay Effect for a Modular Multilevel Converter VSC HVDC System
- Other Titles
- A Design Methodology of Digital Controller Considering Time Delay Effect for a Modular Multilevel Converter VSC HVDC System
- Issue Date
- Feb-2016
- Publisher
- 전력전자학회
- Keywords
- Time delay effect; Modular multilevel converter; Digital control; High voltage direct current
- Citation
- 전력전자학회 논문지, v.21, no.1, pp.49 - 57
- Indexed
- KCI
- Journal Title
- 전력전자학회 논문지
- Volume
- 21
- Number
- 1
- Start Page
- 49
- End Page
- 57
- ISSN
- 1229-2214
- Abstract
- A modular multilevel converter is widely adapted for a high-voltage direct current power transmission system. This study proposes a design methodology for a novel digital control that mitigates the negative effects caused by time delay, including communication transport delay for a modular multilevel converter. The modeling and negative effect of time delay are analyzed theoretically in a frequency domain, and its compensation methodology based on an inverse model is described fully with practical considerations. The proposed methodology is verified through several simulation results using a modular 21-level converter system.
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Related Researcher
- Kim, Rae Young
- COLLEGE OF ENGINEERING (MAJOR IN ELECTRICAL ENGINEERING)