Design and implementation of GPU-based turbo decoder with a minimal latency
- Authors
- Ahn, Heungseop; Jin, Yong; Han, Sangwook; Choi, Seungwon; Ahn, Sungsoo
- Issue Date
- Jun-2014
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- CUDA; GPU; parallel MAP decoder; Turbo decoder
- Citation
- Proceedings of the International Symposium on Consumer Electronics, ISCE, pp.1 - 2
- Indexed
- SCOPUS
- Journal Title
- Proceedings of the International Symposium on Consumer Electronics, ISCE
- Start Page
- 1
- End Page
- 2
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/159797
- DOI
- 10.1109/ISCE.2014.6884510
- ISSN
- 0000-0000
- Abstract
- Decoding latency of the turbo decoder has been a serious problem in real-time processing of communication systems. This paper presents a novel procedure of reducing the latency of the turbo decoder which has been implemented with GPU (Graphic Processing Unit). The main contribution of this paper is to present an efficient procedure of reducing the latency of GPU-based turbo decoder through an efficient parallel processing of maximum a posteriori (MAP). Through experimental tests, we have verified that the proposed turbo decoder reduces the latency from 34,767μs to 273μs per iteration.
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