Fabrication of on-chip fluidic channels incorporating nanopores using self-aligned double layer resist processing technique
- Authors
- Kim, Bongho; Kwon, Jihun; Kim, Daehong; Chun, Sungwoo; Lee, Hyungyu; Lee, Seung-Beck
- Issue Date
- Nov-2012
- Publisher
- A V S AMER INST PHYSICS
- Citation
- JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, v.30, no.6, pp.1 - 4
- Indexed
- SCIE
SCOPUS
- Journal Title
- JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B
- Volume
- 30
- Number
- 6
- Start Page
- 1
- End Page
- 4
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/164331
- DOI
- 10.1116/1.4767234
- ISSN
- 1071-1023
- Abstract
- The authors report on the development of a self-aligned double layer resist processing technique that allows incorporation of ion channel nanopores into on-chip microfluidic channels. The patterned positive/negative electron-beam resist double layer acts as a sacrificial template for the fabrication of on-chip fluidic channels and the nanopores. By controlling the resist dimensions, it was possible to tailor the shape of the on-chip fluidic channel and the nanopore dimensions. Using this technique, the authors demonstrated the fabrication of sub-10 nm nanopore arrays on 2 mu m wide and 800nm high on-chip fluidic channels. With further developments, it will be possible to have controllable on-chip nanopores with integrated nanofluidics.
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