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Leveraging Parallel Computing in Modern Video Coding Standards

Authors
Choi, KihoJang, Euee S.
Issue Date
Jul-2012
Publisher
Institute of Electrical and Electronics Engineers
Keywords
CEAA; co-exploration between algorithm and architecture; HEVC; High Efficiency Video Coding standard; multicore processing; multimedia; multimedia standards; parallel processing; video coding standards
Citation
IEEE Multimedia, v.19, no.3, pp 7 - 11
Pages
5
Indexed
SCI
SCIE
SCOPUS
Journal Title
IEEE Multimedia
Volume
19
Number
3
Start Page
7
End Page
11
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/165154
DOI
10.1109/MMUL.2012.36
ISSN
1070-986X
1941-0166
Abstract
Video coding has always been a computationally intensive process. Although dramatic improvements in coding efficiency have been realized in recent years, the algorithms have become increasingly complex and there is a broader recognition that it is necessary to realize the capabilities of multicore processors. This article discusses how recent trends in parallel computing have influenced the design of modern video coding standards. Specifically, the authors discuss how the High Efficiency Video Coding (HEVC) standard, which is being jointly developed by ISO/IEC JTC1/SC29 WG11 (MPEG) and ITU-T SH16/Q.6 (VCEG), is looking at ways to implement the co-exploration between algorithm and architecture (CEAA) approach.
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Jang, Euee S.
COLLEGE OF ENGINEERING (SCHOOL OF COMPUTER SCIENCE)
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