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Executing Synchronous Dataflow Graphs on an SPM based Multi-core Architecture

Authors
오현옥
Issue Date
Jun-2012
Publisher
Design Automation Conference
Keywords
Multiprocessor scheduling; synchronous dataflow; scratch pad memory; multicore architecture; memory overlay; prefetching
Citation
Design Automation Conference, no. , pp. 1 - 8
Indexed
OTHER
Journal Title
Design Automation Conference
Start Page
1
End Page
8
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/165259
DOI
10.1145/2228360.2228480
ISSN
0738-100X
Abstract
In this paper we are concerned about executing synchronous dataflow (SDF) applications on a multicore architecture where a core has a limited size of scratchpad memory (SPM). Unlike traditional multi-processor scheduling of SDF graphs, we consider the SPM size limitation that incurs code and data overlay overhead. Since the scheduling problem is intractable, we propose an EA(evolutionary algorithm)-based technique. To hide memory latency, prefetching is aggressively performed in the proposed technique. The experimental results show that our approach reduces the overlay overhead significantly compared to a non-optimized approach and the previous approach.
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