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Executing synchronous dataflow graphs on a SPM-based multicore architecture

Authors
Choi, JunchulOh, HyunokKim, SungchanHa, Soonhoi
Issue Date
Jun-2012
Keywords
memory overlay; multicore architecture; multiprocessor scheduling; prefetching; scratch pad memory; synchronous dataflow
Citation
Proceedings - Design Automation Conference, pp 664 - 671
Pages
8
Indexed
SCOPUS
Journal Title
Proceedings - Design Automation Conference
Start Page
664
End Page
671
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/165488
DOI
10.1145/2228360.2228480
ISSN
0738-100X
0146-7123
Abstract
In this paper we are concerned about executing synchronous dataflow (SDF) applications on a multicore architecture where a core has a limited size of scratchpad memory (SPM). Unlike traditional multi-processor scheduling of SDF graphs, we consider the SPM size limitation that incurs code and data overlay overhead. Since the scheduling problem is intractable, we propose an EA(evolutionary algorithm)-based technique. To hide memory latency, prefetching is aggressively performed in the proposed technique. The experimental results show that our approach reduces the overlay overhead significantly compared to a non-optimized approach and the previous approach.
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