A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow
- Authors
- Wang, Zhongkai; Choi, Minsoo; Wright, John; Lee, Kyoungtae; Liu, Zhaokai; Yin, Bozhi; Han, Jaeduk; Du, Sijun; Alon, Elad
- Issue Date
- May-2022
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- hybrid; PLL; PLL generator; ring oscillator; sub-sampling
- Citation
- Proceedings - IEEE International Symposium on Circuits and Systems, v.2022-May, pp.2881 - 2885
- Indexed
- SCOPUS
- Journal Title
- Proceedings - IEEE International Symposium on Circuits and Systems
- Volume
- 2022-May
- Start Page
- 2881
- End Page
- 2885
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/173246
- DOI
- 10.1109/ISCAS48785.2022.9937615
- ISSN
- 0271-4310
- Abstract
- We present a ring-oscillator-based sub-sampling phase-locked loop (PLL) using a generator-based design flow. A hybrid loop with a delta-sigma (Delta Sigma) modulator is applied to reduce the loop filter (LF) area and the control ripple. The generator automatically produces the ring oscillator and PLL to meet the provided specifications. The 10-GHz PLL instance implemented in 28-nm planar process achieves RMS jitter of}299.5 fs and power of 9.9 mW from a 1-V supply.
- Files in This Item
-
Go to Link
- Appears in
Collections - 서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.