Nanoscale Two-Bit/Cell NAND Silicon-Oxide-Nitride-Oxide-Silicon Devices Designed on Fully Depleted Silicon-on-Insulator Substrates
- Authors
- Kim, Hyun Joo; You, Joo Hyung; Kwack, Kae Dal; Kim, Tae Whan
- Issue Date
- Sep-2010
- Publisher
- IOP PUBLISHING LTD
- Citation
- JAPANESE JOURNAL OF APPLIED PHYSICS, v.49, no.9, pp.1 - 4
- Indexed
- SCIE
SCOPUS
- Journal Title
- JAPANESE JOURNAL OF APPLIED PHYSICS
- Volume
- 49
- Number
- 9
- Start Page
- 1
- End Page
- 4
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/174139
- DOI
- 10.1143/JJAP.49.094201
- ISSN
- 0021-4922
- Abstract
- Nanoscale 2-bit/cell NAND silicon-oxide-nitride-oxide-silicon (SONOS) memory devices with two separated control gates utilizing a fully depleted silicon-on-insulator (SOI) structure were designed. The program and erase characteristics of the proposed unique nanoscale 2-bit/cell NAND SONOS memory devices were simulated using technology computer-aided design tools. Simulation results showed that the leakage current in the subthreshold region and the subthreshold swing for the nanoscale 2-bit/cell NAND SONOS memory devices were decreased by utilizing a SOI structure. The initial threshold voltage of the nanoscale 2-bit/cell NAND SONOS memory devices with a SOI structure was larger than that of conventional SONOS devices without a SOI structure, indicative of a decrease in leakage current. Simulation results showed that the short-channel effects in the nanoscale 2-bit/cell NAND SONOS memory devices decreased in magnitude owing to a larger effective channel length.
- Files in This Item
-
Go to Link
- Appears in
Collections - 서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles
![qrcode](https://api.qrserver.com/v1/create-qr-code/?size=55x55&data=https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/174139)
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.