Detailed Information
Cited 0 time in 
Cited 0 time in 
Cited 0 time in
Metadata Downloads
Boosted Bit Line Program Scheme for Low Operating Voltage MLC NAND Flash Memory
- Authors
- Song, Youngsun; Park, Ki-Tae; Kang, Myounggon; Song, Yunheub; Lee, Sungsoo; Lim, Youngho; Suh, Kang-Deog
- Issue Date
- Mar-2010
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- Keywords
- bit line; coupling capacitance; V-pass window margin; boosted channel
- Citation
- IEICE TRANSACTIONS ON ELECTRONICS, v.E93C, no.3, pp.423 - 425
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEICE TRANSACTIONS ON ELECTRONICS
- Volume
- E93C
- Number
- 3
- Start Page
- 423
- End Page
- 425
- ISSN
- 0916-8524
- Abstract
- A boosted bit line program scheme is proposed tor low operating voltage in the (MLC) NAND Hash memory Our BL to BL boosting scheme. which uses the BL coupling capacitance. is applied to achieve a higher channel potential than is possible with V-cc. so that the V-pass window margin is improved by up to 59% in 40 nm MLC NAND flash memory with 2 7 V V-cc In the case of 1 8 V V-cc, the margin of the proposed scheme is 12% higher than one of the conventional schemes at 2 7 V V-cc.
- Files in This Item
- Go to Link
- Appears in
Collections - 서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
Related Researcher
- Song, Yun Heub
- COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)