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Hierarchical Use of Heterogeneous Flash Memories for High Performance and Durability

Authors
Jung, SanghyukSong, Yong Ho
Issue Date
Aug-2009
Publisher
Institute of Electrical and Electronics Engineers
Keywords
NAND flash memory; flash translation layer; embedded storage; hybrid SSD
Citation
IEEE Transactions on Consumer Electronics, v.55, no.3, pp 1383 - 1391
Pages
9
Indexed
SCIE
SCOPUS
Journal Title
IEEE Transactions on Consumer Electronics
Volume
55
Number
3
Start Page
1383
End Page
1391
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/176416
DOI
10.1109/TCE.2009.5278004
ISSN
0098-3063
1558-4127
Abstract
The use of NAND flash memory for building permanent storage has been increasing in many embedded systems due to idiosyncrasies such as non-volatility and low energy consumption. The persistent requirements for high storage capacity have given rise to the increase of bit density per cell as in multi-level cells but this has come at the expense of performance and has resulted in degradation of durability. In this paper, we introduce a complementary approach to boost the performance and durability of MLC-based storage systems by employing a non-volatile buffer that temporarily holds the data heading to MLCs. We also propose algorithms 10 efficiently eliminate unnecessary write and erase operations in MLCs by performing a pre-merge in the buffer. Our experiments show that the proposed approach can decrease average response time by up to 4 times and increase durability by 4 times by adding only a small hardware cost.
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