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Multilevel dual-channel NAND flash memories with high-speed read and verifying program
- Authors
- Kim, Jae-Ho; Lee, Joung-Woo; Mun, Kyung-Sik; Kim, Tae Whan
- Issue Date
- Oct-2006
- Publisher
- IEEE
- Keywords
- Asymmetrically-doped channel; Current sensing; Multi-level dual-channel; Reduce reading and program verifying time
- Citation
- 2006 IEEE Nanotechnology Materials and Devices Conference, NMDC, v.1, pp.382 - 383
- Indexed
- SCOPUS
- Journal Title
- 2006 IEEE Nanotechnology Materials and Devices Conference, NMDC
- Volume
- 1
- Start Page
- 382
- End Page
- 383
- ISSN
- 0000-0000
- Abstract
- The multilevel dual channel (MLDC) NAND flash memory cell structures with asymmetrically-doped channel regions are proposed. The channel structures with a MLDC flash cell consisted of the two different doping channel regions. The technical computer aided design simulation results showed that the designed MLDC NAND flash cell provided the high-speed multilevel reading and program verifying due to the sensing of the discrete current levels utilizing the unique asymmetric channel structure.
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