A 12-Gb/s Baud-rate Clock and Data Recovery with 75% Phase-detection Probability by Precoding and Integration-Hold-Reset Frontend
DC Field | Value | Language |
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dc.contributor.author | Seo, Hyeongmin | - |
dc.contributor.author | Han, Jiyun | - |
dc.contributor.author | Kim, Kyungmin | - |
dc.contributor.author | Lim, Baekjin | - |
dc.contributor.author | Shin, Eunseok | - |
dc.contributor.author | Choi, Youngdon | - |
dc.contributor.author | Ko, Hyungjong | - |
dc.contributor.author | Choi, Jung-Hwan | - |
dc.contributor.author | Lee, Sang-Hyun | - |
dc.contributor.author | Yoo, Changsik | - |
dc.contributor.author | Han, Jaeduk | - |
dc.date.accessioned | 2023-05-03T11:23:42Z | - |
dc.date.available | 2023-05-03T11:23:42Z | - |
dc.date.created | 2022-11-02 | - |
dc.date.issued | 2023-02 | - |
dc.identifier.issn | 1549-7747 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/185241 | - |
dc.description.abstract | This paper describes a 12-Gb/s quarter-rate receiver with a current-integrating baud-rate clock and data recovery (CDR) technique. The proposed CDR receives a pre-encoded non-return-to-zero (NRZ) data stream and integrates with 0.5-UI phase offset to extract the phase information. By sampling three consecutive symbols with multiple thresholds in the proposed phase detector, the CDR achieves a 75% phase-detection probability, which is the highest among baud-rate CDRs and leads to a better tracking bandwidth and jitter tolerance. The 12-Gb/s baud-rate CDR prototype is implemented in a 28 nm CMOS process and consumes 77 mW from a 1.2-V supply. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A 12-Gb/s Baud-rate Clock and Data Recovery with 75% Phase-detection Probability by Precoding and Integration-Hold-Reset Frontend | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Han, Jaeduk | - |
dc.identifier.doi | 10.1109/TCSII.2022.3212881 | - |
dc.identifier.scopusid | 2-s2.0-85139821792 | - |
dc.identifier.wosid | 000929815700012 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.70, no.2, pp.411 - 415 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
dc.citation.title | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
dc.citation.volume | 70 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 411 | - |
dc.citation.endPage | 415 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | DFE | - |
dc.subject.keywordPlus | CDR | - |
dc.subject.keywordAuthor | Clocks | - |
dc.subject.keywordAuthor | Symbols | - |
dc.subject.keywordAuthor | Receivers | - |
dc.subject.keywordAuthor | Timing | - |
dc.subject.keywordAuthor | Phase detection | - |
dc.subject.keywordAuthor | Jitter | - |
dc.subject.keywordAuthor | Precoding | - |
dc.subject.keywordAuthor | Baud-rate CDR | - |
dc.subject.keywordAuthor | current integration | - |
dc.subject.keywordAuthor | transition probability | - |
dc.subject.keywordAuthor | receiver | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/9913680 | - |
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