Double-Gated Ferroelectric-Gate Field-Effect-Transistor for Processing in Memory

Abstract

In this letter, we propose a double-gated ferroelectric-gate field-effect-transistor (DG-FeFET) for processing-in-memory (PIM) operations in a single device for the first time. The proposed device is highly compatible with a conventional fin field-effect-transistor (FinFET) process and thus the scalable Fin FeFET with the completely sympatric double gates can be fabricated by adding only one gate metal recess process. After the rigorous calibrations of the ferroelectric and device technology computer aided design (TCAD) models by utilizing the fabricated ferroelectric capacitor and planar FeFET, it is demonstrated that the 16-Boolean logic operations including XNOR, NAND and AND can be stably implemented in a single DG-FeFET through energy-efficient two step operation scheme.