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A novel fabrication method for co-integrating ISFET with damage-free sensing oxide and threshold voltage-tunable CMOS read-out circuits

Authors
Kwon, Dae WoongLee, RyoongbinKim, SihyunMo, Hyun-SunKim, Dae HwanPark, Byung-Gook
Issue Date
May-2018
Publisher
ELSEVIER SCIENCE SA
Keywords
Hybrid sensing system of ISFET and CMOS read-out circuits; Co-integration of ISFETs and CMOS devices; Damage-free sensing oxide in ISFET; Threshold voltage-tunable CMOS read-out circuits
Citation
SENSORS AND ACTUATORS B-CHEMICAL, v.260, pp.627 - 634
Indexed
SCIE
SCOPUS
Journal Title
SENSORS AND ACTUATORS B-CHEMICAL
Volume
260
Start Page
627
End Page
634
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/190944
DOI
10.1016/j.snb.2017.12.193
ISSN
0925-4005
Abstract
A novel fabrication method using a top SiO2-SiN-bottom SiO2 (ONO) dielectric stack is proposed and implemented to obtain ion sensitive field effect transistor (ISFET) with damage-free sensing oxide and threshold voltage (Vth)-tunable devices in CMOS read-out circuits. By wet-etching the top SiO2 and the SiN sequentially, the ISFET with damage-free sensing oxide is obtained due to the high selectivity between them. Also, the Vth-tunable circuit devices with the ONO stacks are simultaneously achieved by protecting the ONO stacks from the wet-etching. Through the measurements of pH and biomolecule responses, it is confirmed that the pH and biomolecule can be detected stably because the drain current (I-D) is stabilized to a predetermined value more quickly and the I-D fluctuation during the I-D stabilization is significantly reduced compared with devices having damaged sensing oxide. Additionally, it is verified that the Vth of devices for circuits can be fine-controlled by injecting charges into the SiN via Fowler-Nordheim tunneling. Furthermore, it is demonstrated that the biomolecule-induced Vth shift of similar to 150 mV in the proposed ISFET is successfully amplified to the output voltage change of similar to 370 mV in common source amplifier (CSA) voltage-readout circuit consisting of one p-type ISFET and one Vth-tuned n-type MOS.
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