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Program scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation

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dc.contributor.authorKim, Do-Bin-
dc.contributor.authorKwon, Dae Woong-
dc.contributor.authorKim, Seunghyun-
dc.contributor.authorLee, Sang-Ho-
dc.contributor.authorPark, Byung-Gook-
dc.date.accessioned2023-09-18T07:14:58Z-
dc.date.available2023-09-18T07:14:58Z-
dc.date.created2023-07-07-
dc.date.issued2018-02-
dc.identifier.issn0038-1101-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/190945-
dc.description.abstractTo obtain high channel boosting potential and reduce a program disturbance in channel stacked NAND flash memory with layer selection by multilevel (LSM) operation, a new program scheme using boosted common source line (CSL) is proposed. The proposed scheme can be achieved by applying proper bias to each layer through its own CSL. Technology computer-aided design (TCAD) simulations are performed to verify the validity of the new method in LSM. Through TCAD simulation, it is revealed that the program disturbance characteristics is effectively improved by the proposed scheme.-
dc.language영어-
dc.language.isoen-
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.titleProgram scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation-
dc.typeArticle-
dc.contributor.affiliatedAuthorKwon, Dae Woong-
dc.identifier.doi10.1016/j.sse.2017.10.014-
dc.identifier.scopusid2-s2.0-85031686341-
dc.identifier.wosid000425490800010-
dc.identifier.bibliographicCitationSOLID-STATE ELECTRONICS, v.140, no.SI, pp.46 - 50-
dc.relation.isPartOfSOLID-STATE ELECTRONICS-
dc.citation.titleSOLID-STATE ELECTRONICS-
dc.citation.volume140-
dc.citation.numberSI-
dc.citation.startPage46-
dc.citation.endPage50-
dc.type.rimsART-
dc.type.docType정기학술지(Article(Perspective Article포함))-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.relation.journalWebOfScienceCategoryPhysics, Condensed Matter-
dc.subject.keywordPlusComputer aided design-
dc.subject.keywordPlusElectronic design automation-
dc.subject.keywordPlusMemory architecture-
dc.subject.keywordPlusNAND circuits-
dc.subject.keywordPlusThree dimensional integrated circuits-
dc.subject.keywordAuthor3D stacked NAND flash memory-
dc.subject.keywordAuthorChannel stacked NAND flash memory-
dc.subject.keywordAuthorLayer selection by multi-level operation (LSM)-
dc.identifier.urlhttps://www.sciencedirect.com/science/article/pii/S0038110117307608?via%3Dihub-
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