Program scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Do-Bin | - |
dc.contributor.author | Kwon, Dae Woong | - |
dc.contributor.author | Kim, Seunghyun | - |
dc.contributor.author | Lee, Sang-Ho | - |
dc.contributor.author | Park, Byung-Gook | - |
dc.date.accessioned | 2023-09-18T07:14:58Z | - |
dc.date.available | 2023-09-18T07:14:58Z | - |
dc.date.created | 2023-07-07 | - |
dc.date.issued | 2018-02 | - |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/190945 | - |
dc.description.abstract | To obtain high channel boosting potential and reduce a program disturbance in channel stacked NAND flash memory with layer selection by multilevel (LSM) operation, a new program scheme using boosted common source line (CSL) is proposed. The proposed scheme can be achieved by applying proper bias to each layer through its own CSL. Technology computer-aided design (TCAD) simulations are performed to verify the validity of the new method in LSM. Through TCAD simulation, it is revealed that the program disturbance characteristics is effectively improved by the proposed scheme. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
dc.title | Program scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kwon, Dae Woong | - |
dc.identifier.doi | 10.1016/j.sse.2017.10.014 | - |
dc.identifier.scopusid | 2-s2.0-85031686341 | - |
dc.identifier.wosid | 000425490800010 | - |
dc.identifier.bibliographicCitation | SOLID-STATE ELECTRONICS, v.140, no.SI, pp.46 - 50 | - |
dc.relation.isPartOf | SOLID-STATE ELECTRONICS | - |
dc.citation.title | SOLID-STATE ELECTRONICS | - |
dc.citation.volume | 140 | - |
dc.citation.number | SI | - |
dc.citation.startPage | 46 | - |
dc.citation.endPage | 50 | - |
dc.type.rims | ART | - |
dc.type.docType | 정기학술지(Article(Perspective Article포함)) | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.subject.keywordPlus | Computer aided design | - |
dc.subject.keywordPlus | Electronic design automation | - |
dc.subject.keywordPlus | Memory architecture | - |
dc.subject.keywordPlus | NAND circuits | - |
dc.subject.keywordPlus | Three dimensional integrated circuits | - |
dc.subject.keywordAuthor | 3D stacked NAND flash memory | - |
dc.subject.keywordAuthor | Channel stacked NAND flash memory | - |
dc.subject.keywordAuthor | Layer selection by multi-level operation (LSM) | - |
dc.identifier.url | https://www.sciencedirect.com/science/article/pii/S0038110117307608?via%3Dihub | - |
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