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Effects of Asymmetric String Structure on Word-Line Interference in the Vertical NAND Flash Memory Devices

Authors
Lee, Jun GyuYoo, Keon-HoKim, Tae Whan
Issue Date
Jun-2017
Publisher
AMER SCIENTIFIC PUBLISHERS
Keywords
Vertical NAND Flash Memory; Word-Line Interference; Poly-Silicon Channel; Charge Trapping Layer; Threshold Voltage Shift
Citation
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.17, no.6, pp.4173 - 4175
Indexed
SCIE
SCOPUS
Journal Title
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY
Volume
17
Number
6
Start Page
4173
End Page
4175
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/19655
DOI
10.1166/jnn.2017.13425
ISSN
1533-4880
Abstract
The vertical NAND flash memory devices with asymmetric string structure were introduced in order to reduce the word-line interference, and their electric characteristics were investigated as functions of the asymmetric factor (AF) by using technology computer-aided design (TCAD) sentaurus simulation tool. The difference in the threshold voltage (Vth) shift of the target cell was decreased with increasing AF; it was 0.435×10⁻³ V at AF of 0 nm, and 0.009×10⁻³ V at AF of 40 nm. This reduction of the word-line interference for vertical NAND flash memory devices with an increased AF was explained by the increased average distance between the target cell and the three closest cells located at the adjacent string.
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