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Effect of the Nanoscale Bitline String Thickness on the Electric Characteristics of Vertical NAND Flash Memory Devices

Authors
Jung, Hyun SooAhn, JoonsungKim, Tae Whan
Issue Date
Jun-2017
Publisher
AMER SCIENTIFIC PUBLISHERS
Keywords
Vertical NAND Flash Memories; Trap Charge Layer; String Thickness; Threshold Voltage
Citation
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.17, no.6, pp.4145 - 4148
Indexed
SCIE
SCOPUS
Journal Title
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY
Volume
17
Number
6
Start Page
4145
End Page
4148
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/19656
DOI
10.1166/jnn.2017.13411
ISSN
1533-4880
Abstract
The effect of the nanoscale bitline string thickness on the electrical characteristics of vertical NAND flash memory devices was investigated. The trapped charge magnitude in the nitride layer increased with increasing a string thickness up to 20 nm. The program characteristics of vertical NAND flash memory devices with various thicknesses of bitline strings were attributed to the distribution of the trap charges in the nitride trap layers. The cell-to-cell interference in vertical NAND flash memory devices with a cell-to-cell distance of 40 nm was not significantly affected by variation in the string thickness. The threshold voltage shift of an optimal memory device with a string thickness of 20 nm was 0.69 V, which was the largest value among the simulated data.
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