Design of an application specific instruction set processor for a universal bitstream codec
- Authors
- Choi, Seung-Hyun; Roh, Tae-Moon; Song, Yong Ho; Lee, Seong-Won
- Issue Date
- Nov-2014
- Publisher
- The Institute of Electronics, Information and Communication Engineers (IEICE)
- Keywords
- ASIP; entropy coding; RLC; bitstream; H.264
- Citation
- IEICE Electronics Express, v.11, no.24, pp 1 - 12
- Pages
- 12
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEICE Electronics Express
- Volume
- 11
- Number
- 24
- Start Page
- 1
- End Page
- 12
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/202662
- DOI
- 10.1587/elex.11.20141047
- ISSN
- 1349-2543
- Abstract
- Recent increases in the type and amount of multimedia data has required a versatile device enough to play various data. Especially a variety of lossless compression algorithms often causes large amount of redundant computations. In this paper, an application-specific instruction processor tailored to effectively process such coding algorithms is proposed. The functionality and performance of the processor has been verified by using it to run the H.264/AVC baseline profile encoder. The experimental results show that the proposed processor can save about 96% and 36% of the execution cycles of ARM Cortex-A9 and Intel i7 processors, respectively.
- Files in This Item
-
- Appears in
Collections - 서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.