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Analysis of thermal behavior for 3D integration of DRAM
- Authors
- Kim, Youngil; Song, Yong Ho
- Issue Date
- Jun-2014
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- 3D IC; L2 cache; Microprocessor; Thermal analysis
- Citation
- Proceedings of the International Symposium on Consumer Electronics, ISCE, pp 1 - 2
- Pages
- 2
- Indexed
- SCOPUS
- Journal Title
- Proceedings of the International Symposium on Consumer Electronics, ISCE
- Start Page
- 1
- End Page
- 2
- ISSN
- 0000-0000
- Abstract
- The TSV-based 3D integration is a promising technique to improve the chip integration density and increase memory bandwidth. When memories dies are stacked, they are placed on top of a multi-core die. However, the heat dissipated by a die is propagated to neighboring dies and thus increase their temperature. The increased power density in a 3D integration often causes thermal issue to be critical. Therefore, analysis of thermal behavior for 3D integration is essential for solving thermal issue. In this paper, we present our analysis results of the thermal characteristic of various 3D integration techniques.
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