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A 96-Gb/s PAM-8 Transmitter with Transition-Boosted Current-Mode Logic Driver in 40-nm CMOS for Wireline Communication

Authors
Lim, BonaJo, HanheeJeong, HeedoYang, JeonghyuHan, Jaeduk
Issue Date
Jun-2025
Keywords
cascode; current-mode logic driver; feed-forward equalization; PAM-8; transition-boosting; transmitter
Citation
IEEE International Symposium on Circuits and Systems proceedings, pp 1 - 4
Pages
4
Indexed
SCOPUS
Journal Title
IEEE International Symposium on Circuits and Systems proceedings
Start Page
1
End Page
4
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/208490
DOI
10.1109/ISCAS56072.2025.11043270
ISSN
0271-4302
2158-1525
Abstract
A 96-Gb/s PAM-8 transmitter with a transition-boosted current-mode logic (TBCML) driver is introduced and fabricated in 40-nm CMOS technology. The proposed TBCML driver incorporates cross-coupled gate voltage boosting and feedforward coupling techniques to enhance transition speeds for high-speed operation. The implemented transmitter achieves a differential peak-to-peak output swing of 657 mV at a data rate of 96 Gb/s. Feedforward equalization (FFE) is applied to mitigate inter-symbol interference (ISI). The prototype transmitter occupies a die area of 0.15 mm2 and achieves an energy efficiency of 4.33 pJ/b with a total power consumption of 416 mW.
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