A Variation-Robust 20-Gb/s Wireline Transceiver With Real-Time Calibration in 28-nm CMOS

Abstract

This paper describes a variation-robust transceiver with four-tap feed-forward equalization (FFE) and real-time calibration techniques. The design adopts the common-mode balanced and robust FFE (CMBB-FFE), which improves the previous current-mode coefficient-error-robust FFE (B-FFE) to achieve the consistent common-mode level across data patterns and support voltage mode operation. The real-time receiver calibration method adjusts sampling threshold voltages and clock phases in the middle of normal link operation, to enhance the sampling margin under dynamic drifting conditions. The transceiver test chip is fabricated in a 28-nm CMOS process. It occupies 0.419 mm 2 , achieving 20 Gb/s with 9.82-pJ /bit energy efficiency and 33.3% wider horizontal eye-opening by adopting the CMBB-FFE and real-time calibration techniques.