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High-density 3D-NAND flash with dual-string select line (D-SSL)
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kwak, Been | - |
| dc.contributor.author | Kwon, Daewoong | - |
| dc.contributor.author | Yun, Jang-Gn | - |
| dc.date.accessioned | 2026-03-30T03:00:50Z | - |
| dc.date.available | 2026-03-30T03:00:50Z | - |
| dc.date.issued | 2024-09 | - |
| dc.identifier.issn | 2631-8695 | - |
| dc.identifier.issn | 2631-8695 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/211772 | - |
| dc.description.abstract | In this study, high-density 3D-NAND flash memory is proposed. Using D-SSL, lateral shrink of cell area can be achieved by distinguishing two strings in a word-line (WL). We verify erase/program and read characteristics using technology computer-aided design (TCAD) simulations with rigorous calibrated condition. The proposed high density NAND flash has normally-on state SSLs through additional process and electrical treatment. In the conventional reference NAND flash, the cell string connected to the bit-line (BL) is distinguished by WL cut (WLC). On the other hand, in the proposed high density NAND flash, the cell string is selected by utilizing the normally-on state SSLs using trapped hole and doped arsenic at the intersection of SSL1 and SSL2. Compared with the conventional scheme, the proposed D-SSL exhibits almost same erase/program and read characteristics. Consequently, the proposed D-SSL scheme can increase memory density with reduced number of WLCs by distinguishing strings using D-SSL. | - |
| dc.format.extent | 8 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | IoP Institute of Physics | - |
| dc.title | High-density 3D-NAND flash with dual-string select line (D-SSL) | - |
| dc.type | Article | - |
| dc.publisher.location | 영국 | - |
| dc.identifier.doi | 10.1088/2631-8695/ad6be9 | - |
| dc.identifier.scopusid | 2-s2.0-85201890282 | - |
| dc.identifier.wosid | 001294048000001 | - |
| dc.identifier.bibliographicCitation | Engineering Research Express, v.6, no.3, pp 1 - 8 | - |
| dc.citation.title | Engineering Research Express | - |
| dc.citation.volume | 6 | - |
| dc.citation.number | 3 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.endPage | 8 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | Y | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.description.journalRegisteredClass | esci | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Multidisciplinary | - |
| dc.subject.keywordPlus | GRAIN-SIZE | - |
| dc.subject.keywordPlus | THICKNESS | - |
| dc.subject.keywordAuthor | 3D-NAND flash | - |
| dc.subject.keywordAuthor | word-line cut | - |
| dc.subject.keywordAuthor | string select line | - |
| dc.subject.keywordAuthor | arsenic doped cell | - |
| dc.subject.keywordAuthor | hole trapped cell | - |
| dc.subject.keywordAuthor | lateral shrink | - |
| dc.identifier.url | https://iopscience.iop.org/article/10.1088/2631-8695/ad6be9 | - |
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