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High-density 3D-NAND flash with dual-string select line (D-SSL)open access

Authors
Kwak, BeenKwon, DaewoongYun, Jang-Gn
Issue Date
Sep-2024
Publisher
IoP Institute of Physics
Keywords
3D-NAND flash; word-line cut; string select line; arsenic doped cell; hole trapped cell; lateral shrink
Citation
Engineering Research Express, v.6, no.3, pp 1 - 8
Pages
8
Indexed
SCOPUS
ESCI
Journal Title
Engineering Research Express
Volume
6
Number
3
Start Page
1
End Page
8
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/211772
DOI
10.1088/2631-8695/ad6be9
ISSN
2631-8695
2631-8695
Abstract
In this study, high-density 3D-NAND flash memory is proposed. Using D-SSL, lateral shrink of cell area can be achieved by distinguishing two strings in a word-line (WL). We verify erase/program and read characteristics using technology computer-aided design (TCAD) simulations with rigorous calibrated condition. The proposed high density NAND flash has normally-on state SSLs through additional process and electrical treatment. In the conventional reference NAND flash, the cell string connected to the bit-line (BL) is distinguished by WL cut (WLC). On the other hand, in the proposed high density NAND flash, the cell string is selected by utilizing the normally-on state SSLs using trapped hole and doped arsenic at the intersection of SSL1 and SSL2. Compared with the conventional scheme, the proposed D-SSL exhibits almost same erase/program and read characteristics. Consequently, the proposed D-SSL scheme can increase memory density with reduced number of WLCs by distinguishing strings using D-SSL.
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COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)
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