A Driver-Current-Regulated 120-Gb/s PAM-8 7-bit DAC-Based Transmitter in 28-nm CMOS

Abstract

This brief presents a 120-Gb/s eight-level pulse amplitude modulation (PAM-8) 7-bit digital-to-analog converter (DAC) based transmitter with a driver current regulating technique. The output currents through the two MSB tail-less branches are regulated by feedback loops to boost the output resistance, while the LSB branch adopts a stacked tail-less structure to increase the overall DAC resolution. Transition-time-matched high-speed 1-UI pulse generators are implemented for 40-Gbaud/s frontend serialization. The proposed 120-Gb/s transmitter is fabricated in a 28 nm CMOS technology and occupies 0.238 mm2. The measurement results demonstrate that the transmitter achieves 120 Gb/s over a channel with an insertion loss of 8.32 dB at 20 GHz. The proposed current regulation technique improves the worst-case eye height and eye width by 60% and 36%, respectively. The driver-current-regulated PAM-8 transmitter achieves a differential peak-to-peak output swing of 468 mV with feed-forward equalization (FFE) and an energy efficiency of 1.48 pJ/bit, corresponding to a FoM of 0.177 pJ/bit/dB.