Rearchitecting a Neuromorphic Processor for Spike-Driven Brain-Computer Interfacing
- Authors
- Lee, Hunjun; Jang, Yeongwoo; Jung, Daye; Song, Seunghyun; Kim, Jangwoo
- Issue Date
- Dec-2024
- Publisher
- IEEE Computer Society
- Keywords
- Brain-Computer Interface; Flexibility; Neuromorphic Processor; Spike
- Citation
- IEEE/ACM International Symposium on Microarchitecture (MICRO), pp 1073 - 1089
- Pages
- 17
- Indexed
- SCOPUS
- Journal Title
- IEEE/ACM International Symposium on Microarchitecture (MICRO)
- Start Page
- 1073
- End Page
- 1089
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/212579
- DOI
- 10.1109/MICRO61859.2024.00082
- ISSN
- 1072-4451
2379-3155
- Abstract
- Brain-computer interfaces (BCIs) are electrophysiological devices (e.g., electrode arrays) that connect the brain to a computer. They offer neuroscientific and neurological innovations by utilizing a dedicated processor for continuous BCI signal processing. Recent studies propose a scaled-up BCI that adopts an order of magnitude larger number of electrodes to more precisely interface with the brain. As the BCI scales, utilizing a spike-driven processor emerges as an alternative processing method, where the BCI offloads computations to the processor upon detecting spikes. However, the processor design for spike-driven processing has been relatively unexplored compared to that of the continuous processor.
In this work, we propose NeuroLobe, a flexible and efficient processor design for spike-driven processing. The key idea is to utilize a neuromorphic processor to take advantage of its event-driven computing nature. We carefully rearchitect the existing neuromorphic system for the purpose of flexibly and efficiently deploying the BCI algorithms. First, we extend the instruction set architecture of the existing neuromorphic processor to flexibly deploy representative spike-driven BCI algorithms. Second, we redesign the connection controller and execution path to improve the performance. Third, we design a custom synchronization unit for scalable processing. Fourth, we implement a custom software stack to minimize load imbalance among the cores. Lastly, we design a multitask controller to simultaneously process multiple algorithms. We evaluate NeuroLobe on four representative BCI algorithms with 11 configurations. Evaluation results show that NeuroLobe surpasses CPU and GPU in terms of speed and energy efficiency.
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