A Novel Ferroelectric NAND Cell Structure Featuring Ultrathin IGZO Charge Trap Layer for Superior Endurance and Retention

Abstract

We present a ferroelectric nand (FeNAND) cell incorporating an engineered InGaZnO (IGZO) charge trap layer (CTL) within a metal-gate interlayer (G.IL)-oxide semiconductor (OS)–ferroelectric (FE)-channel interlayer (Ch.IL)-semiconductor (MISFIS) gate-stack for highly reliable 3-D integration. Conventional MIFIS-based FeNAND cells suffer from endurance degradation driven by oxygen vacancy (VO) accumulation and severe memory window (MW) loss during retention caused by charge emission at the G.IL/FE interface. To address these limitations, a 2-nm-thick IGZO CTL is introduced, functioning simultaneously as: 1) an oxygen reservoir that suppresses VO -induced endurance failure and 2) an energy barrier that mitigates charge loss during retention. Furthermore, in situ N2 doping is employed to precisely tailor the trap profile, yielding deep-level dominant traps at an N2 flow rate of 2 sccm. The optimized MISFIS FeNAND cell achieves a wide MW of 9.4 V at an operation voltage below 17 V, stable triple-level cell (TLC) retention over ten years, and robust endurance exceeding 80k program (PGM)/erase (ERS) cycles. These results confirm that the IGZO CTL-based MISFIS architecture overcomes key reliability challenges of conventional FeNAND structures and represents a strong candidate for next-generation high-density 3-D FE memory technologies.