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Optimized Memory System Architecture for VESA VDC-M Decoder with Multi-Slice Support
- Authors
- 김지훈
- Issue Date
- 26-May-2025
- Place
- InterContinental London The O2
- Conference Name
- IEEE ISCAS (International Symposium on Circuits and Systems)
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Collections - 서울 공과대학 > 서울 융합전자공학부 > 2. Conference Papers
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Related Researcher
- Kim, Ji Hoon
- COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)