Morphotropic Phase Boundary Engineering via Heterostructure for Low-Voltage Ferroelectric Capacitorsopen access
- Authors
- Han, Changhyeon; Kwak, Been; Kwon, Ki-Ryun; Kim, Jeong-Han; Yim, Jiyong; Kim, Hyun-Min; Kwak, Sangeun; Kwon, Daewoong
- Issue Date
- Jun-2026
- Publisher
- John Wiley and Sons Inc
- Keywords
- ferroelectric; heterostructure; Hf<sub>x</sub>Zr<sub>1-x</sub>O<sub>2</sub>; metal-ferroelectric-metal; morphotropic phase boundary; switching acceleration
- Citation
- Advanced Electronic Materials, v.12, no.12, pp 1 - 9
- Pages
- 9
- Indexed
- SCIE
SCOPUS
- Journal Title
- Advanced Electronic Materials
- Volume
- 12
- Number
- 12
- Start Page
- 1
- End Page
- 9
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/219040
- DOI
- 10.1002/aelm.70418
- ISSN
- 2199-160X
2199-160X
- Abstract
- We investigated morphotropic phase boundary (MPB) engineering via heterostructure design to achieve low-voltage and fast-switching ferroelectric capacitors based on HfxZr1-xO2 (HZO). By integrating an MPB layer with a conventional ferroelectric HZO layer in a metal–ferroelectric–metal (MFM) structure, the proposed heterostructure (HZOHetero) exhibits a ≈25% reduction in coercive voltage and an approximately 10% increase in capacitance compared to conventional ferroelectric HZO capacitors, while maintaining the same physical thickness. These improvements originate from polarization switching in the MPB layer near 0 V, which synergistically enhances the effective electric field across the ferroelectric layer, together with an optimized phase balance that lowers the polarization switching barrier. This MPB-based heterostructure strategy offers a CMOS-compatible and energy-efficient pathway for advanced ferroelectric capacitors targeting low-power memory applications.
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