Unveiling the Hybrid-Channel (poly-Si/IGO) Structure for 3D NAND Flash Memory for Improving the Cell Current and GIDL-Assisted Erase Operationopen access
- Authors
- Choi, Su-Hwan; Sim, Jae-Min; Shin, Jeongmin; Ryu, Seong-Hwan; Hwang, Taewon; Lim, So Young; Oh, Hye-Jin; Kwag, Jae-Hyeok; Lee, Jun-Yeoub; Song, Ki-Cheol; Lee, Yeonhee; Song, Minju; Kim, Junghwan; Park, Chang-Kyun; Song, Yun-Heub; Park, Jin-Seong
- Issue Date
- May-2025
- Publisher
- WILEY-V C H VERLAG GMBH
- Keywords
- 3D NAND flash memories; atomic layer deposition; crystallinity; gate-induced drain leakage erase operation; hybrid channel (poly-Si/In–Ga–O)
- Citation
- SMALL STRUCTURES, v.6, no.5, pp 1 - 10
- Pages
- 10
- Indexed
- SCIE
SCOPUS
- Journal Title
- SMALL STRUCTURES
- Volume
- 6
- Number
- 5
- Start Page
- 1
- End Page
- 10
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/219185
- DOI
- 10.1002/sstr.202400495
- ISSN
- 2688-4062
2688-4062
- Abstract
- Oxide semiconductors (OSs) are promising materials for NAND flash memory, offering the advantages of high field-effect mobility and superior large-area uniformity but suffering from low thermal stability, trade-off between mobility and stability, and the impossibility of the erase operation. To address these drawbacks, herein a hybrid-channel structure comprising heterostacked poly-Si and In–Ga–O (IGO) is developed. IGO is used as the main channel to achieve thermal stability above 800 °C, and the fabrication process is optimized to achieve superior electrical properties (μFE = 103.66 cm2 V−1 s−1, subtreshold swing = 96 mV decade−1) and reliability (0.07 V positive shift during the positive bias temperature stress of 3 MV cm−1 at 100 °C for almost 3 h). Poly-Si is used to generate the gate-induced drain leakage current and enable the erase operation. The developed structure is used to fabricate 2D planar and three-layer stacked 3D NAND flash memories. The superior electrical properties (μFE = 116.08 cm2 V−1 s−1, Ion = 4.73 μA μm−1) and deviations of the hybrid-channel NAND memory are comparable with those of its OS-channel counterpart. The use of the hybrid-channel structure in the NAND memories enables the realization of the erase operation with a large memory window (≈3.60 V).
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