FinFETs With a Deep Buried Channel to Reduce the Readout Noise in CMOS Image Sensors
- Authors
- Ryu, Ju Tae; Jeon, Seong Bae; Koh, Hyun Seung; Kim, Tae Whan
- Issue Date
- May-2016
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Random telegraph noise; FinFET; CMOS image sensor; oxide trap
- Citation
- IEEE ELECTRON DEVICE LETTERS, v.37, no.5, pp.530 - 532
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ELECTRON DEVICE LETTERS
- Volume
- 37
- Number
- 5
- Start Page
- 530
- End Page
- 532
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/23106
- DOI
- 10.1109/LED.2016.2541778
- ISSN
- 0741-3106
- Abstract
- FinFETs with a deep buried channel (DBC) are proposed for the reduction of readout noise in complementary metal-oxide-semiconductor image sensors (CISs). Simulation results show that the influence of defects at the Si/SiO2 interface on the drain current is reduced for the DBC design as the drain current variation in DBC FinFETs is 50% smaller than those in surface-and buried-channel metal-oxide-semiconductor field-effect transistor. The potential barriers at the fin sidewalls serve to confine electrons away from the defects at the Si/SiO2 interface, resulting in decreased readout noise in the CIS.
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